Priyank Kalla

Associate Professor

Electrical and Computer Engineering Merrill Engineering Bldg., #4512 University of Utah, Salt Lake City, UT-84112 Ph: (801)-587-7617 Email: KALLA@ece.utah.edu

Education:

Ph.D., University of Massachusetts at Amherst, 2002.

M.S., University of Massachusetts at Amherst, 1998.

B.E., Birla Vishvakarma Mahavidyala, 1993.

Research Interests

My area of work is related to automated synthesis and optimization, validation and verification of digital VLSI systems:

• Formal Verification of RTL descriptions
  • Equivalence Checks, RTL-Satisfiability, Assertion Checking.
• Application of Finite Ring Algebra to Synthesis and Verification of Arithmetic Datapaths with Finite Word-Length Operands:
  • Modeling Bit-Vector Arithmetic as Polynomial Functions over Finite Integer Rings
  • Decision Procedures based on Algorithmic Analysis of Polynomial Ideals and their Varieties
• Formal Verification of Hardware Implementations of Cryptography Primitives over Galois Fields using Computer Algebra and Algebraic Geometry
• Design Automation for Optic/Photonic Logic
  • Logic Design and Synthesis in Si-Photonics
  • Physical Design Automation for Si-Photonics Integration
  • Thermal issues in Si-Photonics Design Automation
• New Techniques to Guide CNF-SAT Search:
  • Static and Dynamic Variable Orderings, Constraint Partitioning
  • Proving UNSAT by Directly Searching for UNSAT Cores.
• Using Groebner's Proof Systems for Simplification of Design Verification and SAT solving.

Funding for Our Research

NSF, GOALI Supplement Grant 2008-2011.

NSF Faculty Early Career Development (CAREER) Award 2006.

NSF, CISE/CCF, 1-Year Grant, 2005-2006. Expired.

University of Utah Research Foundation, SEED Grant, 2005-2006. Expired.

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Graduate Students

Chris Condrat - BS/MS 2007, PhD student. Design Automation for Si-Photonics Integration.

Jinpeng Lv - PhD student. Hardware Verification of Galois Field Arithmetic for Cryptographic Applications.

Former Students

Namrata Shekhar - PhD, Completed Aug 2007. Senior R & D Engineer, Synopsys, Formality Group, Marlborough, MA. Dissertation Title: Equivalence Verification of Arithmetic Datapaths using Finite Ring Algebra.

Sivaram Gopalakrishnan - MS 2004, PhD Summer 2008. Senior R & D Engineer, Synopsys, Formality Group, Hillsboro, OR. Dissertation Title: High-Level Synthesis of Polynomial Datapaths using Finite Integer Algebras.

Vijay Durairaj - ME 2004, PhD summer 2008. Senior R & D Engineer, Synopsys ESP Group . Dissertation topic: Improving SAT Solving by Analyzing Constraint-Variable Dependencies.

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Publications and Presentations

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Teaching:

• Spring 2012: ECE/CS 5740/6740: CAD of Digital Circuits
  • Class Webpage

• Fall 2011: ECE/CS 3710: Computer Design Lab

• Spring 2011: ECE/CS 3700: Fundamentals of Digital System Design
• Fall 2010: Computer Algebra for Electrical Engineers and Computer Scientists
  • ECE 5960-001, ECE 6962, CS 5960, CS 6962

• Fall 2008: ECE/CS 5745/6745: Testing and Verification of Digital Circuits

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Recent Conference and Service Activities

• A new workshop is being organized for the first time, Computer-Algebra in Computer-Aided Design and Verification (CA-CAV), July 15 2011, Snowbird, Utah. The workshop is co-located with the Computer-Aided Verification Conference (CAV) 2011.
• I am a co-chair, along with Ashish Tiwari (SRI), for this workshop. Please consider submitting your work to this workshop. The CFP can be found on the workshop website.

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If you would like to boost/deflate my ego, please (do not?) hesistate to send me Email at: KALLA@ece.utah.edu

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