/* Study this code carefully, there are 3 different ways in which I
have written the code. Synthesize each of the code fragments yourself,
view the RTL schematic, and observe synthesis results in terms of LUT
usage */

module compare(A, B, f);
input [3:0] A, B;
output [1:0]f;
reg [1:0] f;

// Unsigned comparator Design specification:
// if A > B, f = 00; if A==B, f = 01; if A<B, f=10 
// Synthesize the code fragments below
// A combinational circuit should not have a latch at the output

always @(A or B)
begin
	
	if(A > B) f = 2'b00;
	else if (A < B) f = 2'b01;
	else if (A == B) f = 2'b10;
	else f = 2'b11;
	// is the last line needed? 
	//If not, can you just comment it out?
	/* In other words, will the following 
	code work as a combinational circuit?*/
	/*----
	if(A > B) f = 2'b00;
	else if (A < B) f = 2'b01;
	else if (A == B) f = 2'b10;
	----*/

	// Now try to synthesize following code instead
	/*if(A > B) f = 2'b00;
	else if (A < B) f = 2'b01;
	else f = 2'b10;
	*/

end

endmodule