Course Objective and Description
================================

Objective: To learn modern techniques and algorithms for synthesis and
optimization of digital systems. Topics in combinational logic
optimization cover Boolean algebra, decision diagrams, two-level and
multi-level logic and technology mapping. Sequential optimization
covers FSM minimization, decomposition, encoding and Retiming.

This course presents modern approaches to logic design and
verification of digital circuits, including necessary background
material in Boolean Logic, Finite State Machines, Decision Diagrams,
and SAT algorithms.  The first part of the course will give the
fundamentals of Boolean algebra, function representation and basic
algorithms. We shall concentrate on basic theory and efficient
implementation techniques that allow one to understand how logic
synthesis and verification tools work. This is useful to both who want
to write such tools and to those who simply want  to use them
proficiently.  Every circuit optimization technique has "side-effects"
and it is important to know the pros-and-cons of all circuit design
techniques. 

The course will be devoted to Logic Synthesis, concentrating some
two-level and multi-level ASIC and FPGA synthesis. Novel synthesis
methods based on BDDs, AIGs, etc., will be covered in detail
here. Technology-mapping to both ASICs and FPGAs will be discussed. 

Finally, the last part will be devoted to sequential circuit
optimization and will cover FSM minimization, encoding and re-encoding
problems.