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U of U IEEE Student Chapter Wins Awards

U of U IEEE Student Chapter Wins Awards...

The IEEE Utah Section Executive Committee has selected the University of Ut... more

Faculty Openings

Faculty Openings...

Faculty Openings The Department of Electrical and Computer Engineering... more

Team Designs New 3D Microscope for Your Brain

Team Designs New 3D Microscope for Your Brain...

A University of Utah team discovered a method... more


more events…
“UDCC Open House”
Sep 17 @ 10:00 am – 3:00 pm

“UDCC Invites Engineering Students to Open House”


The Utah Data Center Consortium (UDCC), a collection of industry leaders formed to help students further their education in data center management, is holding an open house Wednesday, Sept. 17 for engineering students interested in pursuing this new, high-tech certificate. The event will be held from 10 a.m. to 3 p.m. in the Catmull Gallery at the John E. and Marva M. Warnock Engineering Building.

Students from computer science, electrical engineering, and mechanical engineering are encouraged to look at this fascinating curriculum comprised of courses that can give them a leg up when looking for work with big companies dealing with big data.

“We want to recruit students for the certificate as well as for internships,” said Valerio Pascucci, Director for the Data Center Engineering Certificate.

Companies who have big data centers will be on hand to talk to students, including XMission, eBay, Dean-Flour, Goldman Sachs and more. The first hour will be devoted to a workshop on resume writing, and John Dehlin, co-founder and CEO of KualiCo., will deliver a keynote address. At 12:30 p.m., panel discussions will be held for students to discuss the future of data centers.

“We also have people floating around from Career Services as well as other industry members who will be answering questions,” said Brenda Peterson, academic manager for the Data Center Engineering Certificate, who is organizing the event.

Pascucci, who also is the director of the Center for Extreme Data Management Analysis and Visualization at the University of Utah, said companies that store huge volumes of data have been asking the University of Utah on how to better prepare students for this emerging field.

“We had industry people come to us and ask us to create something that would produce graduates who are ready to be placed with a company,” Pascucci said. “We are the first in the west to have a certificate and to get it successfully launched. We’ve had good response so far, and it’s growing.”

For more information on the event, contact Brenda Peterson and Valerio Pascucci at or visit

First Session Classes: Last day to withdraw from classes
Sep 19 all-day
First Session Classes: Last day to withdraw from classes
Graduate Seminar – “High-Efficiency PA Techniques: Incorporating Novel Devices and Architectures for Improved Efficiency Wideband and High-Speed Communication”
Sep 22 @ 3:00 pm – 4:00 pm
Graduate Seminar - "High-Efficiency PA Techniques: Incorporating Novel Devices     and Architectures for      Improved Efficiency Wideband and High-Speed Communication" @ Warnock (WEB 1250)

Dr. Jeffrey S. Walling

University of Utah Electrical & Computer Engineering Department

When: Monday, September 22, 2014 at 3:05 p.m.
Where: Warnock 1250


CMOS is used nearly ubiquitously for digital computation, and as such plays an ever increasing role in our lives as we increasingly use computation to improve working efficiency. Increasing levels of integration have made it possible to embed analog and RF circuits with digital processing on a single integrated circuit. The RF power amplifier (PA) has been the exception to integration in CMOS, owing to its relatively poor performance (e.g., peak output power and energy efficiency) when compared to other semiconductor technologies (e.g., III-V compounds and SiGe). In this talk I will introduce digital PAs (DPAs), which leverage CMOS inherent strengths of fast switching speeds and superior lithographic matching to yield a linear, efficient digital power amplifier. I will also examine current research in the University of Utah Power Efficient RFIC lab addressing limitations in DPAs, and high power PAs using GaN devices. The aim of such PAs is to enable reconfigurable operation for software-defined and cognitive radios networks.

Speaker Biography

Jeff Walling received the B.S. degree from the University of South Florida, Tampa, in 2000, and the M.S. and Ph. D. degrees from the University of Washington, Seattle, in 2005 and 2008, respectively. Prior to starting his graduate education he was employed at Motorola, Plantation, FL working in cellular handset development. He interned for Intel, Hillsboro from 2006-2007, where he worked on highly-digital transmitter architectures and CMOS power amplifiers and continued this research while a Postdoctoral Research Associate with the University of Washington. He is currently an Assistant Professor in the ECE Department at University of Utah, where he directs the Power Efficient RFIC Lab.

His current research interests include power amplifier design, high-efficiency transmitter architectures and low energy wireless circuits. Dr. Walling has authored over 30 articles in peer reviewed journals and refereed conferences and holds two patents. Recently he received the Best Paper Award at Mobicom 2012. He has also received the Yang Award for outstanding graduate research from the University of Washington, Department of Electrical Engineering in 2008, an Intel Predoctoral Fellowship in 2007-2008, and the Analog Devices Outstanding Student Designer Award in 2006.


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