“Nanosystems Design and Tools”
Dr. Pierre-Emmanuel Gaillardon, Research Associate, Laboratory of Integrated Systems, Swiss Federal Institute of Technology – EPFL

Mon. March 30th, 2015 from 3:05 – 3:55 p.m. in WEB 1230


Nanosystems are integrated systems exploiting nanodevice technologies. Nanodevices are either advanced Complementary-Metal-Oxide-Semiconductor (CMOS) transistor technologies or disruptive beyond-CMOS alternatives that can replace or enhance pure silicon technologies. The broad objective of this talk is to study circuits, architectures and design tools which, based on a deep understanding and abstraction of the technologies, allow us to realize nanosystems that outperform current integrated systems in terms of capabilities and performance.

In the first part of the talk, I will introduce a novel class of computation devices, based on current silicon technology, which exhibit a controllable-polarity property. Controllable polarity devices enable a compact realization of XOR/MAJ-based logic functions, which are not implementable in CMOS in a compact form.

In the second part of the talk, I will present emerging logic synthesis techniques, which can achieve native support for emerging nanoprimitives and extend the performances of current technologies. Two novel logic representation forms that show superior performances in manipulating logic functions will be discussed. In addition, I will show how their expressiveness can be leveraged in the design of Field Programmable Gate Arrays (FPGAs) architectures.

In the final part of the talk, I will explain how we exploited the unconventional physical properties offered by Resistive memories (RRAMs) in FPGAs. Instead of only employing RRAMs as pure memories, we extended their use to that of non-volatile switches and we designed innovative circuits for routing elements, in which the memories take integral part in the data path. This approach is expected to lead to a breakthrough in the field of high performance reconfigurable platforms demonstrating more density, a higher performance and a better energy efficiency.


Pierre-Emmanuel Gaillardon works for EPFL, Lausanne, Switzerland, as a research associate at the Laboratory of Integrated Systems (LSI). He holds an Electrical Engineer degree (CPE-Lyon, France, 2008), a M.Sc. degree (INSA Lyon, France, 2008) and a Ph.D. in Electrical Engineering (CEA-LETI, Grenoble, France – University of Lyon, France, 2011). Previously, he was research assistant at CEALETI, Grenoble, France and visiting research associate at Stanford University, Palo Alto, CA, USA. He is recipient of the C-Innov 2011 best thesis award and the Nanoarch 2012 best paper award. He has been serving as TPC member for DATE’15, VLSI-SoC’15, CMOS-ETR’13-15, Nanoarch’12-14, ISVLSI’14 conferences and is reviewer for several journals, conferences and funding agencies. The research activities and interests of Dr. Gaillardon are currently focused on the development of reconfigurable logic architectures and circuits exploiting emerging device technologies and novel EDA techniques.